Post by rickman Post by Joerg Post by Vladimir Vassilevsky Post by Joerg
In an embedded application I need to slow down the /OE of a 74LVT244
so it turns tri-state fast but goes onto the bus slower, to avoid a
brief contention when addresses change. Is it ok for that family to
slow /OE by 200nsec or so via RC? It'll be the usual two resistor, one
diode and one cap deal. Want to avoid adding another Schmitt here.
You can make a delay using something like 1G97.
I could also do it with a 74HC14 but I wanted to avoid more chips.
Post by Vladimir Vassilevsky
But the 200ns seems like an awful long time. Why would you need that?
I might get away with 100nsec. There is going to be some intricate
address decoding, more than just a 688 and a 154.
To the OP, if you need 100 ns of delay to make your timing come out,
there may be a problem with the design. I am sure you know what you
are doing, but typically the /OE is used on all bus devices as the
timing control and the /CE is used for selection. Most devices
generate the /OE with enough timing margin relative to the address and
any CPU generated /CE controls that you shouldn't need to delay /OE.
You say your address decoding is very complex, is this what the /OE
delay is needed to compensate for? Is there a way to speed up the
Not really, unless I use a CPLD here which I don't want to. These board
should not contain any programmables. There are SPI devices and these
only have one enable, not /OE plus /CE. BTW they use various names for
that pin. Even within the same company (Analog Devices) it's called
/SYNC on the DACs I am using and /CS on the ADC.
On SPI the MISO line should be coming off tri-state a bit delayed to
make sure the others have definitely let go of it.
Post by rickman
I would like to understand what the diode based circuit is doing. I
am primarily a digital designer and learned a long time ago that
analog components in a digital circuit usually meant someone was using
a bandaid or did not know how to do things "correctly". I'm not
saying this is a true statement, but this was the view I was taught.
Is the diode in series with the driver (with a resistor in parallel
with the diode) along with a pull up resistor and the cap? I would
like to see how this circuit would work just so I could use it if I
ever needed to. I think that (in opposition to my training) there are
times when a simple analog circuit is ok to use in a digital design,
for example, a clock detector using a differentiator and an RC
filter. But it is important to pay attention to voltage levels over
temperature to make sure enough voltage margin is preserved.
Cannot post a schematic from this computer but it's simple: Imagine an
RC with the R in series and a cap to ground. That creates a delay. Now
place a series combo of another R and a diode across the resistor and
the delay becomes shorter in one direction. That's basically it. When
you have Schmitts and fulfill the logic swing thresholds the diode is
ok. For really low voltage logic you can use a BAT54 but at 3.3V a
regular one is usually fine. I never shied away from combining analog
and logic. Built switcher supplies and what not around these.
Vladimir: I did not call shamans before releasing this stuff because I
am a Lutheran :-)))